The present disclosure relates generally to integrated circuit (IC) manufacturing, and more particularly to inspecting defects in fabricating microelectronic devices through a photolithographic process.
Modern microelectronic devices are commonly produced using a photolithographic process. In this process, a semiconductor wafer is first coated with a layer of photoresist. This photoresist layer is then exposed to illuminating light with a photomask image (for simplicity, the terms photomask, mask, and reticle will be used interchangeably and with equivalency) and subsequently developed. After the development, the patterned photoresist produces an image of the mask on the wafer. Thereafter, the uppermost layer of the wafer is etched, implanted or otherwise processed. Thereafter, the remaining photoresist is stripped. For multilayer wafers, the above procedure is then repeated to produce subsequent patterned layers.
The semiconductor manufacturing is a highly cost competitive industry and there is constant pressure for manufacturers to decrease die cost while increasing functionality. To that end, the use of increasingly sophisticated and higher resolution photolithography tools is required to propel the downward drive in circuit feature size. The major limitations on the resolution of the image that can be projected on the photoresist are created by the light diffraction effects in the optical train from the illuminator optics through the mask/pellicle assembly then through the stepper reduction optics and finally onto the surface of the photoresist. The mask design and mask manufacturing limitations, which impact the quality of the mask, also limit the final resolution achievable by photolithography exposure system. The diffraction effects become increasingly important as the wavelength of the electromagnetic radiation used in the exposure of the photoresist becomes significant with respect to the feature size on the mask utilized during the exposure of the photoresist. Increasing the achievable resolution, thereby decreasing the size of the reproducible features of the projected images, may be accomplished by decreasing the wavelength of the light that is used in the photoresist exposure. For this reason, it is advantageous to use electromagnetic radiation in the ultraviolet region with increasingly smaller wavelengths. Particularly, ultraviolet i-line (365 nm), deep UV (248 nm), and 193 nm have been used. Another method for increasing the resolution of the image is the use of RET (Resolution Enhancement Techniques) which include: off axis illumination, OPC (Optical Proximity Correction) reticles, and PSM (Phase Shift Mask) reticles.
Looking more closely at the OPC method, the layout of the design of the mask is altered in such a way that the mask produces a higher resolution image on the photoresist. Optical proximity corrections introduced into the mask design compensate for the optical proximity effects caused by the limited resolution of the optical exposure system used in the photolithographic process. An reduction optical stepper is one example of an optical exposure system. Other types of optical exposure systems include optical scanners and step-and-scan exposure systems. The most common optical proximity effects include corner rounding, line end shortening, and line width non-linearity. Photomask manufacturing limitations, including mask etching, also contributes to the proximity effects. To correct for the proximity effects such as corner rounding, reentrant and outside serifs are added to the mask design. To correct for line width variations, so called sub-resolution features are utilized in the mask layout.
In order to facilitate the evaluation of the mask performance at the wafer level, tools have been developed that are able to scan a photomask and yield an aerial image of the mask as it would appear at the wafer plane. According to this method, the mask inspection system replicates an optical exposure tool's critical parameters used during the exposure of the photoresist during semiconductor device fabrication. The mask inspection device then applies a set, or a plurality of sets, of exposure conditions that may be used in the actual photolithographic process to create an aerial image, or plurality of images, from the mask. In particular, these systems match the wavelength, the partial coherence of the exposure light, illumination aperture and the imaging numerical aperture (NA) of the optical exposure system. The created aerial image is typically magnified and detected using a CCD camera that is sensitive to the ultraviolet radiation. The acquired aerial images are analyzed using software algorithms developed for defect identification.
The current photomask inspection procedures fall short in the inspection process in that the actual circuit image produced on the semiconductor wafer from the photomask has not been verified directly back to the design layout. Accordingly, there is a need for an inspection system that would make it possible to detect line width errors in the image that the mask would actually produce on the semiconductor wafer. It also is desirable for the mask inspection system to provide speedy and reliable identification of the above mentioned mask defects.